00      System configuration is displayed; going to give control to INT 19 boot loader.
01      Processor register test about to start, and NMI to be disabled.
02      NMI is disabled; power on delay starting.
03      Power-on delay complete.
04      Keyboard controller soft reset/power on test.
05      Soft reset/power on determined; going to enable ROM.
06      ROM enabled calculating ROM BIOS checksum and check keyboard buffer clear.
07      ROM BIOS checksum ok, keyboard buffer clear, issuing BAT command to keyboard.
08      BAT command issued to keyboard, going to verify BAT command.
09      Keyboard BAT verified, keyboard command byte next.
0A      Keyboard command byte code issued, going to write command byte data.
0B      Keyboard controller command byte written; going to issue  pin-23,24 blocking/unblocking command.
0C      Pin-23,24 of keyboard controller blocked/unblocked; NOP command issued.
0D      NOP command processing done; CMOS shutdown register test to be done next.
0E      CMOS shutdown register R/W test ok; going to calculate CMOS checksum.
0F      CMOS checksum calculation done and DIAG byte written; CMOS initialisation to begin.
10      CMOS initialisation done; CMOS status register about to initialise for date and time.
11      CMOS status register initialised, going to disable DMA and interrupt controllers.
12      DMA controller 1 and 2, interrupt controller 1 and 2 disabled; about to disable video display and initialise port-B.
13      Video display is disabled and port-B initialised; chipset init/auto memory detection to begin.
14      Chipset init/auto memory detection over; 8254 timer test about to start.
15      CH-2 timer test halfway; 8254 CH-2 timer test to be complete.
16      CH-2 timer test over; 8254 CH-1 timer test to be complete. 
17      CH-1 timer test over; 8254 CH-0 timer test to be complete.
18      CH-0 timer test over; about to start memory refresh.
19      Memory refresh started; memory refresh to be done next.
1A      Memory refresh line is toggling; going to check 15 micro-second on/off time.
1B      Memory refresh period 30 micro-second test complete; base 64K memory test about to start.
20      Base 64K memory test started; address line test to be done.
21      Address line test passed; going to do toggle parity.
22      Toggle parity over; going for sequential data R/W test.
23      Base 64K sequential data R/W test ok; any setup before interrupt vector initialisation about to start.
24      Setup required before vector initialisation complete; interrupt vector initialisation about to begin.
25      Interrupt vector initialisation done; going to read I/O port of 8042 for turbo switch.
26      I/O port of 8042 is read; going to initialise global data for turbo switch.
27      Global data initialisation is over; any initialisation after interrupt vector to be done next.
28      Initialisation after interrupt vector is complete; going for monochrome mode setting.
29      Monochrome mode setting is done; going for colour mode setting.
2A      Colour mode setting is done; about to go for toggle parity before optional ROM test.
2B      Toggle parity over; about to give control for any setup required before optional video ROM check.
2C      Processing before video ROM control is done; about to look for optional video ROM and give control.
2D      Optional video ROM control is done; about to give control to any other processing after video ROM returns control.
2E      Return from processing after the video ROM control; if EGA/VGA not found then do display memory R/W test.
2F      EGA/VGA not found; display memory R/W test about to begin.
30      Display memory R/W test passed; about to look for the retrace checking.
31      Display memory R/W test or retrace checking failed; about to do alternate display memory R/W test.
32      Alternate display memory R/W test passed; about to look for the alternate display retrace checking.
33      Video display checking over; verification of display type with switch setting and actual card to begin.
34      Verification of display adaptor done; display mode to be set next.
35      Display mode set complete; BIOS ROM data area about to be checked.
36      BIOS ROM data area check over; going to set cursor for power on message.
37      Cursor setting for power on message ID complete; going to display the power on message.
38      Power on message display complete; going to read new cursor position.
39      New cursor position read and saved; going to display the reference string.
3A      Reference string display is over; going to display the Hit [esc] message.
3B      Hit [esc] message displayed; virtual mode memory test about to start.
40      Preparation for virtual mode test started; going to verify from video memory.
41      Returned after verifying from video memory; going to prepare the descriptor tables.
42      Descriptor tables prepared; going to enter virtual mode for memory test.
43      Entered in virtual mode; going to enable interrupts for diagnostics mode.
44      Interrupts enabled (if diagnostics switch is on); going to initialise data to check memory wrap-around at 0:0.
45      Data initialised; going to check for memory wrap-around at 0:0 and find total system memory size.
46      Memory wrap-around test done; memory size calculation over; about to go for writing patterns to test memory.
47      Pattern to be test-written in extended memory: going to write patterns in base 640K memory.
48      Patterns written in base memory; going to determine amount of memory below 1Mb.
49      Amount of memory below 1Mb found and verified; going to determine amount of memory above 1Mb.
4A      Amount of memory above 1Mb found and verified; going for BIOS ROM data area check.
4B      BIOS ROM data area check over; going to check [esc] and clear memory below 1Mb for soft reset.
4C      Memory below 1Mb cleared (soft reset); going to clear memory above 1Mb.
4D      Memory above 1Mb cleared (soft reset); going to save the memory size.
4E      Memory test started (no soft reset); about to display the first 64K memory test.
4F      Memory size display started; will be updated during memory test; going for sequential and random memory test.
50      Memory test below 1Mb complete; going to adjust memory size for relocation and shadow.
51      Memory size adjusted due to relocation and shadow; memory test above 1Mb to follow.
52      Memory test above 1Mb complete; going to prepare to go back to real mode.
53      CPU registers are saved including memory size; going to enter in real mode.
54      Shut down successful, CPU in real mode; Going to restore registers saved during preparation for shutdown.
55      Registers restored; going to disable gate A-20 address line.
56      A-20 address line disable successful; BIOS ROM data area about to be checked.
57      BIOS ROM data area check halfway; continuing.
58      BIOS ROM data area check over; going to clear Hit [esc] message.
59      Hit [esc] message cleared; [WAIT...] message displayed; about to start DMA and interrupt controller test.
60      DMA page register test passed; about to verify from video memory.
61      Video memory verification over; about to go for DMA #1 base register test.
62      DMA #1 base register test passed; about to go for DMA #2 register test.
63      DMA #2 base register test passed; about to go for BIOS ROM data area check.
64      BIOS ROM data area check halfway; continuing.
65      BIOS ROM data area check over; about to program DMA unit 1 and 2.
66      DMA unit 1 and 2 programming over; about to initialise 8259 interrupt controller.
67      8259 initialisation over; about to start keyboard test.
80      Keyboard test started, clearing output buffer, checking for stuck key; about to reset keyboard.
81      Keyboard reset error/stuck key found; about to issue keyboard controller interface test command.
82      Keyboard controller interface test over; about to write command byte and initialise circular buffer.
83      Command byte written, global data initialisation done; about to check for lock-key.
84      Lock-key checking over; about to check for memory size mismatch with CMOS.
85      Memory size check done; about to display soft error and check for password or bypass setup.
86      Password checked; about to do programming before setup.
87      Programming before setup complete; going to CMOS setup program.
88      Returned from CMOS setup program and screen is cleared; about to do programming after setup.
89      Programming after setup complete; going to display power-on screen message.
8A      First screen message displayed; about to display [WAIT...] message.
8B      [WAIT...] message displayed; about to do main and video BIOS shadow.
8C      Main and video BIOS shadow successful; setup options programming after CMOS about to start.
8D      Setup options are programmed, mouse check and initialisation to be done next.
8E      Mouse check and initialisation complete; going for hard disk, floppy reset.
8F      Floppy check returns that floppy is to be initialised, floppy setup to follow.
90      Floppy setup is over; test for hard disk presence to be done.
91      Hard disk presence test is over; hard disk setup to follow.
92      Hard disk setup complete; about to go for BIOS ROM data area check.
93      BIOS ROM data area check halfway; continuing.
94      BIOS ROM data area check over; going to set base and extended memory size.
95      Memory size adjusted  due to mouse and hard disk type 47 support; going to verify display memory.
96      Returned after verifying display memory; going to do initialisation before C800:0 optional ROM control.
97      Any initialisation before C800:0 optional ROM control is over; optional ROM check and control to be done next.
98      Optional ROM control is done; about to give control to do any required processing after optional ROM returns control.
99      Any initialisation required after optional ROM test over; going to set up timer data area and printer base address.
9A      Return after setting timer and printer base address; going to set the RS-232 base address.
9B      Returned after RS-232 base address; going to do any initialisation before coprocessor test.
9C      Required initialisation before coprocessor is over; going to initialise the coprocessor next.
9D      Coprocessor initialised; going to do any initialisation after coprocessor test.
9E      Initialisation after coprocessor test is complete; going to check extended keyboard, keyboard ID, and Num Lock.
9F      Extended keyboard check is done, ID flag set, Num Lock on/off, keyboard ID command to be issued.
A0      Keyboard ID command issued; keyboard ID flag to be reset.
A1      Keyboard ID flag reset; cache memory test to follow.
A2      Cache memory test over; going to display any soft errors.
A3      Soft error display complete; going to set the keyboard typematic rate.
A4      Keyboard typematic rate set; going to program memory wait states.
A5      Memory wait states programming over; screen to be cleared next.
A6      Screen cleared; going to enable parity and NMI.
A7      NMI and parity enabled; going to do any initialisation required before giving control to optional ROM at E000:0.
A8      Initialisation before E000:0 ROM control over; E000:0 ROM to get control next.
A9      Returned from E000:0 ROM control; going to do any initialisation required after E000:0 optional ROM control.
AA      Initialisation after E000:0 optional ROM control is over; going to display the system configuration.